Specifications
Module Family
Forlinx UP4 - pin-to-pin compatible system-on-modules in a 40 x 40 mm outline
Package
Hybrid LCC castellated holes plus LGA pads with 487 pins total
Pitch
1.0 mm contact pitch on LCC and 1.27 mm ball pitch on LGA
Design Benefit
One carrier board design can support multiple CPU variants through module substitution
FET-MX9352-UP4
NXP i.MX 9352 with 2x Cortex-A55 at 1.7 GHz, Cortex-M33 at 250 MHz, 2D GPU and 0.5 TOPS Ethos-U65 NPU
FET3568-UP4
Rockchip RK3568B2/J with 4x Cortex-A55 up to 2.0/1.8 GHz, Mali-G52 MP2 GPU and 1 TOPS NPU
FET3562J-UP4
Rockchip RK3562J with 4x Cortex-A53 at 1.8 GHz, Mali-G52-2EE GPU and 1 TOPS NPU
FET527N-UP4
Allwinner T527N octa-core (4x A55 at 1.8 GHz plus 4x A55 at 1.4 GHz), 200 MHz RISC-V core, 600 MHz HiFi4 DSP, Mali-G57 MC1 and 2 TOPS NPU
FET536-UP4
Allwinner T536 with 4x Cortex-A55 up to 1.6 GHz, 600 MHz RISC-V core, low-power RISC-V core, 2D GPU and 2 TOPS NPU
NXP Memory Configuration
1GB LPDDR4 with 8GB eMMC flash
RK3568 Memory Configuration
4GB or 8GB LPDDR4X with 32GB or 64GB eMMC flash
RK3562J Memory Configuration
1GB or 2GB LPDDR4 with 8GB or 16GB eMMC flash
T527N Memory Configuration
2GB or 4GB LPDDR4 with 16GB or 32GB eMMC flash
Storage Expansion
Up to 2x SD/SDIO interfaces depending on module variant
NPU Range Across Family
0.5 TOPS to 2 TOPS depending on the processor selected
Target Segments
Industrial HMI, gateway, display and edge AI products needing a processor roadmap rather than a single socket
Overview
The Forlinx UP4 family attacks a specific supply-chain problem: designing once for a processor you may have to change. All modules share a 40 x 40 mm outline with a hybrid LCC and LGA package carrying 487 pins at 1.0 mm contact pitch on the castellated edge and 1.27 mm ball pitch underneath. A single carrier board can therefore be populated with any family member without a respin.
The processor spread is wide and deliberate. The NXP option uses the i.MX 9352 with two Cortex-A55 cores, a Cortex-M33 real-time core and a 0.5 TOPS Ethos-U65 microNPU. Two Rockchip options cover the RK3568B2/J at up to 2.0 GHz with a Mali-G52 MP2 and 1 TOPS NPU, and the RK3562J with four Cortex-A53 cores and a 1 TOPS NPU. Two Allwinner options round out the range: the T527N octa-core pairing with a 200 MHz RISC-V core, a 600 MHz HiFi4 DSP and a 2 TOPS NPU, and the T536 with four Cortex-A55 cores and a 2 TOPS NPU.
Because memory and storage are configured per module rather than per carrier, the same product can be offered in different performance tiers purely by changing the module. The NPU ceiling of 2 TOPS at the top of the range keeps the family in the vision pre-processing and lightweight classification segment, which is where most industrial HMI and gateway designs actually sit.
Key Benefits
Pin-compatible across four processor vendors for supply-chain resilience, 487 pins in a 40 x 40 mm LCC/LGA package, 0.5 to 2 TOPS NPU options, and per-module memory and storage configurations for product tiering without a carrier respin.
Applications
Industrial HMI and display products, edge AI gateways, machine vision pre-processing nodes, medical and instrument panels, and multi-tier product lines built on a single carrier design.
Request a Quote — FORLINX UP4 — 40X40 MM LCC/LGA SYSTEM-ON-MODULE FAMILY WITH ROCKCHIP, NXP AND ALLWINNER OPTIONS
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