Specifications
Form Factor
SMARC 2.1/2.2 compliant, 314-pin connector, 82 x 50 mm
Processor
NXP i.MX95 (MIMX9596XVTXNAC)
Application Cores
Hexa-core 64-bit Arm Cortex-A55 up to 1.8 GHz
Real-Time Core
Arm Cortex-M7 up to 800 MHz
Safety Core
Arm Cortex-M33 up to 333 MHz, configurable as a safety island
Functional Safety
First i.MX family device to support hardware-enforced functional safety
NPU
Integrated 2 TOPS eIQ Neutron NPU (INT8 at 1 GHz)
GPU
Arm Mali-G310 3D GPU
Memory
4 GB or 8 GB LPDDR5
Storage
32 GB or 64 GB eMMC plus 32 Kbit EEPROM
Wireless
Onboard Wi-Fi 6 and Bluetooth 5.4 module (AzureWave AW-XM729)
Security
Independent TPM 2.0 chip, NXP EdgeLock secure enclave, integrated PMIC
Networking Interfaces
2x RGMII for dual Gigabit Ethernet
High-Speed Expansion
1x PCIe Gen3.0, 2x USB 3.0 host, 2x USB 2.0 host, 1x USB 2.0 OTG
Fieldbus / Serial
2x CAN FD, 4x UART, 2x SPI, 2x SAI, 3x I2C
Display Interfaces
MIPI-DSI, HDMI, 2x LVDS
Camera Interface
1x MIPI-CSI
Operating Temperature
-40C to +85C industrial range
PCB / Certification
12-layer PCB design, CE and RoHS certified
SOM Part Numbers
MYC-JMX9596-32E4D-180-I (4GB/32GB) and MYC-JMX9596-64E8D-180-I (8GB/64GB)
Companion Dev Board
MYD-JMX95X carrier with dual GbE, 4G/5G mini PCIe, M.2-2280 PCIe NVMe, dual CAN FD, audio and microSD
Optional Accessories
MY-CAM003M MIPI camera, MY-LVDS070C 7-inch LVDS display, MY-MIPI101C-V2 10.1-inch MIPI display
Software Package
U-Boot 2025.04, Linux kernel 6.12.49, Yocto myir-image-full with pre-built GUI, open-source drivers
Announced
September 4, 2026
Overview
The MYIR MYC-JMX95X is a SMARC 2.1/2.2 compliant system-on-module built on NXP's i.MX95 applications processor, measuring 82 x 50 mm on a 12-layer PCB and specified across the full -40C to +85C industrial range. It targets industrial control, in-vehicle infotainment, medical devices and smart edge IoT platforms that need AI acceleration alongside deterministic real-time behaviour.
The architecture is deliberately heterogeneous. Six 64-bit Cortex-A55 cores at up to 1.8 GHz run the Linux application stack, a Cortex-M7 at up to 800 MHz handles real-time control, and a Cortex-M33 at up to 333 MHz can be configured as a safety island. According to MYIR, the i.MX95 is the first device in the i.MX family to support hardware-enforced functional safety, which is what makes the module relevant to medical and industrial equipment requiring certified safety architectures.
AI capability comes from an integrated eIQ Neutron NPU rated at 2 TOPS INT8 at 1 GHz, paired with an Arm Mali-G310 3D GPU for graphics and HMI rendering. The module carries 4GB or 8GB LPDDR5, 32GB or 64GB eMMC, 32 Kbit EEPROM, an onboard AzureWave AW-XM729 Wi-Fi 6 and Bluetooth 5.4 module, an independent TPM 2.0 chip and NXP's EdgeLock secure enclave. The 314-pin SMARC connector exposes dual RGMII Ethernet, PCIe Gen3.0, USB 3.0, dual CAN FD, four UARTs, MIPI-CSI and dual LVDS. A full Linux board support package built on U-Boot 2025.04 and kernel 6.12.49 ships with source for the kernel and peripheral drivers.
Key Benefits
SMARC 2.2 open standard module with a 314-pin connector; 2 TOPS eIQ Neutron NPU plus Mali-G310 GPU; hexa Cortex-A55 with dedicated Cortex-M7 real-time and Cortex-M33 safety cores for hardware-enforced functional safety; 4GB or 8GB LPDDR5 and up to 64GB eMMC; onboard Wi-Fi 6 and Bluetooth 5.4; TPM 2.0 and EdgeLock secure enclave; -40C to +85C industrial rating on a 12-layer PCB; open-source Yocto BSP with U-Boot and kernel 6.12.49.
Applications
Industrial real-time control and PLC-class equipment, in-vehicle infotainment and transport systems, medical devices with functional safety requirements, smart edge IoT platforms, HMI and panel computing, machine vision nodes, robotics controllers.
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