Specifications
Product
HBM4 Controller IP
Industry First
First announced HBM4 controller IP
JEDEC Data Rate
6.4 Gbps (spec)
Max Operating Rate
Up to 10 Gbps
Throughput
2.56 TB/s per HBM4 memory device
Channel Density
Supports up to 32 Gb standard HBM4 densities
Features
Refresh Management (RFM) support
Latency
Look-ahead command processing
Reorder
Integrated reorder functionality
Interface
AXI or native interface to user logic
Compatibility
DFI compatible; pairs with third-party/customer PHY
Data Integrity
End-to-end data parity
Power Modes
Self-refresh and power-down low-power modes
Monitoring
Hardware-level performance activity monitor
RAS
Support for HBM4 RAS features
Applications
AI accelerators, graphics, HPC
Overview
The Rambus HBM4 Controller IP is the industry's first announced HBM4 memory controller. It supports the JEDEC HBM4 specification at 6.4 Gbps and can operate up to 10 Gbps, providing 2.56 TB/s of throughput to each HBM4 memory device — a generational leap over HBM3E for AI accelerators, graphics and HPC.
The controller supports all standard HBM4 channel densities up to 32 Gb, adds Refresh Management (RFM), look-ahead command processing, integrated reorder and end-to-end data parity to maximize bandwidth and minimize latency, and exposes an AXI or native interface to user logic. It is DFI-compatible and can be paired with third-party or customer PHY solutions — including Cadence's HBM PHY — to instantiate a complete HBM4 subsystem.
Key Benefits
Industry-first: earliest HBM4 controller IP. Highest throughput: 2.56 TB/s per device up to 10 Gbps. Interoperable: DFI-compatible, pairs with third-party HBM PHYs.
Applications
AI accelerator and GPU memory subsystems, HPC, graphics, heterogeneous compute architectures moving large data volumes.
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