Specifications
Part Number
CN102
Product Family
Marvell OCTEON 10 DPU platform
CPU Complex
Up to 8x Arm Neoverse N2 cores
Process
TSMC 5 nm
SerDes
10G SerDes
Network Interfaces
Up to 4x 10G + 2x 10G
Memory
DDR5
Host Interface
PCIe 5.0
Crypto
True inline IPSec/SSL hardware acceleration
ML/AI
Hardware ML/AI accelerator
Cores vs CN103
Same 8-core Neoverse N2 complex
Power
10–25 W typical
Target Segment
Entry-level networking equipment and edge appliances
Use as
Offload DPU for a host, or primary SoC in a firewall/router/switch
Software Stack
VPP, SONiC, standard Linux
Life Cycle
Production
OCTEON 10 family positioning
| Part | SerDes | Power | Target |
|---|---|---|---|
| CN102 | 10G | 10–25 W | Entry devices, cost-optimised DPU |
| CN103 | 56G | 25 W | High-throughput 100/200/400GbE equipment |
Use Case
CN102 targets equipment where the port speeds top out at 10G but the control plane still needs server-class cores: a security appliance, an edge router, an SD-WAN gateway or a storage front-end. It gives the same Neoverse N2 complex and hardware crypto as the CN103, so the software image and the VPP/SONiC datapath are portable upward if the platform later needs 50G or 100G lanes.
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