Specifications
Part Number
CZ120
Densities
128 GB and 256 GB
Standard
CXL 2.0 Type 3
Form Factor
E3.S 2T
Host Interface
PCIe Gen5 x8
Module Bandwidth
Up to 36 GB/s read/write (2:1 read/write MLC)
Peak Comparison
Within ~6% of a DDR5-4800 128GB RDIMM at 38.4 GB/s peak
Controller
Microchip SMC 2000 (CXL 2.0 Type 3)
DRAM
Micron 1-alpha node DRAM
Architecture
Dual-channel memory architecture
Power (typical)
27 W (128 GB) / 31 W (256 GB)
MTBF
3,000,000 hours
Server-Level Capacity
Up to 2 TB of incremental memory per server
Database Benefit
Up to 96% more database queries per day vs. RDIMM-only servers
Bandwidth Benefit
24% greater memory read/write bandwidth per CPU
Workloads
In-memory databases, SaaS, AI training and inference, HPC
Qualification
First to achieve the CXL qualification-sample milestone
Life Cycle
Qualification samples / production
Micron CZ120 densities
| Density | Form factor | Interface | Typical power |
|---|---|---|---|
| 128 GB | E3.S 2T | PCIe Gen5 x8, CXL 2.0 Type 3 | 27 W |
| 256 GB | E3.S 2T | PCIe Gen5 x8, CXL 2.0 Type 3 | 31 W |
Use Case
The CZ120 is deployed to break the DRAM-slot ceiling without replacing the server: an E3.S bay takes a module that adds 128GB or 256GB of CXL-attached capacity at close to RDIMM bandwidth, so a fleet that is memory-capacity-bound on in-memory databases or KV caches gains roughly 2TB per server at a fraction of the cost of a new node. Because it is CXL 2.0 Type 3, the memory is usable by the host CPU through the standard CXL memory path with no application change.
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