Specifications

Architecture

Analog Wave Processor (AWP) — weighting, delay and accumulation performed directly on broadband waveforms in the analog domain

Platform

Lotus 200G/lane family

Copper Redriver

TS5802

Optical MZM Driver

TS8802 linear Mach-Zehnder modulator driver

Optical TIA

TS9802 linear transimpedance amplifier

Link Intelligence

TSLink link training and diagnostics via OIF CMIS-LT protocol

Per-Lane Rate

200G/lane PAM4; roadmap to 1.6T and 3.2T modules

Applications

ACC active copper cable, LPO, NPO and CPO co-packaged optics

Equalization

Wave-domain FFE for precursor and postcursor ISI correction; equalization beyond Nyquist

Signal Response

Linear amplitude and phase response across wide bandwidths

Reflection Control

Reflection mitigation via weighted and delayed waveform processing

Power / Latency

DSP-free architecture — lower power and latency than conventional DSP-based retimers

Standards

OIF CMIS-LT; multi-vendor LPO/NPO interoperability demos

Event

Demonstrated at ECOC 2026, Malaga, Spain (September 21-23, 2026)

Vendor

TeraSignal, Irvine, California

Use Cases

AI scale-up fabrics, 51.2T/102.4T switch platforms, GPU cluster interconnect

Overview

TeraSignal's Lotus 200G/lane platform targets the next generation of AI scale-up and scale-out interconnect, where 200G per lane is the building block for 1.6T and 3.2T optical and copper links. The platform pairs the TS5802 copper redriver, the TS8802 linear MZM driver and the TS9802 linear TIA with a shared intelligent connectivity architecture.

At its core is AWP (Analog Wave Processor), a wave-domain signal-processing engine that performs weighting, delay and accumulation directly on broadband electrical waveforms rather than digitized samples. Combined with TSLink link intelligence over the OIF CMIS-LT protocol, it lets linear interconnects correct channel impairments while preserving the low power and low latency that make LPO, NPO and CPO attractive for AI data centers.

Key Benefits

DSP-free linear connectivity cuts power and latency versus retimed DSP modules. Wave-domain FFE and reflection mitigation extend DSP-free link reach. TSLink closed-loop diagnostics deliver link visibility and margin. One architecture spans copper ACC and optical LPO, NPO and CPO at 200G/lane.

Applications

1.6T and 3.2T AI scale-up fabric, GPU cluster interconnect, 51.2T/102.4T switch platforms, LPO/NPO/CPO optical modules, and active copper cables for AI data centers.

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