Specifications
Signalling
224 Gbps-PAM4 per lane, the signalling rate behind 1.6T networking and next-generation AI/ML fabrics
OSFP 1600 solutions
Next-generation OSFP product family with SMT, BiPass and external cable variants
CX2 dual-speed
224G near-ASIC cabled connector system for short-reach ASIC-to-front-panel links
Chip-to-chip portfolio
First-to-market 224G chip-to-chip range covering cables, backplanes and board-to-board connectors
Applications
Near-ASIC connector-to-cable systems, high-performance mezzanine connectivity, OSFP, QSFP-DD and QSFP form factors
BiPass architecture
Cabled connector routing that bypasses lossy PCB traces to preserve signal integrity at 224G
Signal integrity
Impedance-controlled connector and cable designs supporting 224 Gbps-PAM4 insertion loss budgets
Thermal
Cage and connector designs rated for the airflow and power density of 1.6T optical and copper modules
Standards
Built to the OSFP and QSFP-DD multi-source agreement footprints
System scope
Custom architecture design services alongside catalogue connectors for hyperscale deployments
Target platforms
AI/ML training clusters, storage servers and 1.6T switch systems
Migration
Supports designs moving from 112 Gbps-PAM4 to 224 Gbps-PAM4 without changing rack architecture
Overview
Doubling per-lane signalling from 112G to 224 Gbps-PAM4 is what makes 1.6T ports and high-radix AI fabrics possible, and it puts connector and cable loss budgets under severe pressure. Molex's 224G portfolio attacks that at every level of the physical layer: OSFP 1600 module cages and connectors in SMT, BiPass and external-cable variants; the CX2 dual-speed 224G near-ASIC cabled connector system for ASIC-to-front-panel links; and a chip-to-chip range of cables, backplanes and board-to-board connectors.
The recurring design idea is cabled interconnect. Rather than routing 224G signals across lossy PCB traces, BiPass and near-ASIC cable assemblies carry them in controlled-impedance cable from the ASIC package edge to the module cage, preserving the insertion-loss budget that 224 Gbps-PAM4 demands. Molex supplies these as standard products as well as custom architectures.
The same physical layer serves AI/ML training clusters, storage servers and 1.6T switch systems, and is designed to transition existing 112G rack designs to a 224G generation without re-architecting the rack.
Key Benefits
A complete 224 Gbps-PAM4 physical layer from near-ASIC cable systems to OSFP 1600 module cages, so a single vendor covers ASIC-to-panel, board-to-board and backplane links. BiPass cabled routing bypasses lossy PCB traces, protecting the insertion-loss margin at 224G and simplifying high-layer-count board design. First-to-market chip-to-chip 224G portfolio and OSFP/QSFP-DD standards compliance speed qualification for 1.6T switch and AI cluster programmes.
Applications
AI/ML training clusters and GPU-dense servers; 1.6T switch systems and OSFP 1600 ports; near-ASIC cabled links to front-panel cages; high-performance mezzanine and backplane connectivity; storage servers and HPC; and rack-scale fabric upgrades from 112G to 224G signalling.
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