Specifications
Product Type
PCIe 6.0 switch
Lane Count
260 lanes
Radix
Industry's highest-radix PCIe switch
Lane Density
~2x competitive offerings
Technology Origin
XConn Technologies acquisition
Companion Silicon
Marvell Alaska P PCIe retimers
AEC Reach
Extends PCIe 6.0 up to 7 meters with AEC partners
AOC Reach
Beyond 7 meters with active optical cable partners
CXL Compatibility
Drop-in, pin-compatible with Structera S CXL 3.0 switch
Platform Benefit
Single hardware platform supports PCIe and CXL
Sampling
Customer sampling from calendar Q3 2026
Engineering Samples
Available now (OFC 2026 live demo)
Prior Generation
PCIe 5.0 Structera S switches available today
Legacy Lineage
XConn shipped 256-lane PCIe 5.0 switches since 2022
Target Application
Scale-up PCIe fabrics for AI servers and racks
Design Goal
Eliminate multiple smaller switches for density and power
Announced
March 17, 2026 at OFC 2026, Los Angeles
Overview
The Marvell Structera S 60260 is the industry's first 260-lane PCIe 6.0 switch and the highest-radix PCIe switch announced to date. It roughly doubles the lane density of competing devices, which matters because modern AI servers pack more GPUs and accelerators behind a single PCIe scale-up fabric than ever before. Consolidating that fabric onto one 260-lane device avoids the power, latency, board complexity and total cost of ownership penalties that come from stacking multiple smaller switches.
The part builds on Marvell's acquisition of XConn Technologies, which had been shipping 256-lane PCIe 5.0 switches since 2022. Marvell pairs it with its Alaska P PCIe retimer line to form an end-to-end PCIe portfolio: combining the switch with retimers lets AEC partners extend PCIe 6.0 reach to seven meters and AOC partners go beyond that. The Structera S 60260 is also drop-in and pin-compatible with Marvell's Structera S CXL 3.0 switch offerings, so a single hardware platform can serve both PCIe and CXL designs and reduce development cycles.
For AI infrastructure, the switch is a building block for scale-up connectivity between accelerators, GPUs, XPUs, CPUs, SSDs and CXL devices within a server or cluster. It began sampling to customers in calendar Q3 2026, with engineering test samples available and demonstrated live at OFC 2026.
Key Benefits
Highest radix at 260 lanes in a single PCIe 6.0 device, ~2x competing lane density. Fewer devices cuts power, latency and board complexity in scale-up fabrics. PCIe + CXL on one platform via pin-compatible CXL 3.0 switch. Reach extension to 7 m over AEC when paired with Alaska P retimers.
Applications
AI server and rack scale-up fabrics, GPU and accelerator interconnect within a chassis, SSD and CXL device fan-out, high-throughput computing clusters, and next-generation AI/ML training systems that need higher-radix PCIe switching per rack unit.
Request a Quote — MARVELL STRUCTERA S 60260 — 260-LANE PCIE 6.0 SCALE-UP SWITCH
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