Specifications
Series
Samsung HBM3E (Shinebolt)
Stack Height
8-Hi (8-layer)
Capacity
24 GB per stack
Pin Speed
Up to 9.6 Gbps per pin
Per-Stack Bandwidth
1.2 TB/s
Interface Width
1024-bit
Packaging
TC-NCF (Thermal Compression Non-Conductive Film)
Generation
3rd-generation High Bandwidth Memory
Voltage
1.2 V
Target Platforms
AI training accelerators, HPC systems, AI server GPUs
Thermal
NCF layer between die improves heat transfer
Stack Density
8 die plus base die in a single package
Production Status
Volume production
Overview
Samsung HBM3E 8-Hi is the 24 GB-per-stack configuration of the third-generation High Bandwidth Memory standard, sold under the Shinebolt product name. Eight DRAM die stack onto a buffer base die to deliver 24 GB with a 1024-bit interface and 1.2 TB/s of bandwidth per stack.
The packaging technology is TC-NCF — thermal compression with non-conductive film. A non-conductive film layer is applied between each die, which improves heat transfer through the stack while keeping the die electrically isolated. That thermal path is a meaningful constraint on HBM, since the memory stack sits beside the compute die under the same lid.
8-Hi HBM3E is the entry capacity point of the HBM3E family. Systems that scale by number of stacks rather than stack capacity use it to hit a memory target with a better thermal profile than a 12-Hi or 16-Hi part.
Key Benefits
Better thermal path — 8-die stacks are easier to cool than 12-Hi or 16-Hi parts. 1.2 TB/s per stack — full HBM3E bandwidth at the entry capacity point. Volume availability — mature 8-Hi manufacturing.
Applications
AI accelerator packages with lower per-stack memory requirements, HPC clusters, GPU servers that scale memory by stack count, and thermal-limited systems where an 8-Hi stack is preferred over a taller one.
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