Google Ironwood TPU v7 — 192GB HBM3E Inference Accelerator

Specifications

Overview

Ironwood is Google's seventh-generation TPU and the first it explicitly positions as inference-first. Each chip carries 192 GB of HBM3E at up to 7.37 TB/s and delivers 4,614 FP8 TFLOPS — a memory-to-compute ratio tuned for serving large models rather than training them, which is why Ironwood also marks the first TPU generation with native FP8 support.

Scale is the other half of the story. A single Ironwood superpod packs 9,216 chips reaching 42.5 FP8 ExaFLOPS, with 1.2 TB/s of bidirectional ICI per chip, four OSFP cages per chip for the interconnect and one CDFP PCIe cage to the host CPU. Four TPU packages sit on each TPU board. Packaged at 600 W with liquid cooling, Ironwood roughly doubles performance per chip against Trillium and delivers about ten times the peak performance of TPU v5p.

Google made Ironwood generally available on April 22, 2026 at Google Cloud Next. Anthropic is the anchor customer with an initial phase of roughly 400,000 units plus a further ~600,000 committed, a deployment measured in gigawatts. QS Compute supplies AI accelerators, GPU servers and rack-scale compute for inference-heavy deployments — contact us for pricing and availability.

Key Benefits

Inference-optimised balance: 192 GB HBM3E at 7.4 TB/s against 4,614 FP8 TFLOPS. Native FP8: first TPU with hardware FP8 support. Pod-scale fabric: 1.2 TB/s ICI per chip across 9,216-chip pods. Proven at scale: in production for frontier model serving.

Applications

Serving frontier-scale language and multimodal models, low-latency inference at low batch sizes, long-context serving, and large-scale AI deployments where memory capacity per chip is the binding constraint.

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