Specifications
Family
Lattice MachXO5-NX
Type
Secure control FPGA / CPLD-class
Platform
Lattice Nexus FPGA platform
Process
28 nm FD-SOI
Configuration memory
Embedded flash (non-volatile, instant-on)
Security
Best-in-class security; PQC-ready TDQ variant family
I/O
High I/O count for control and interface fan-out
Interfaces
MIPI D-PHY (CSI-2, DSI), LVDS, Ethernet, PCIe, DDR
DSP
Integrated multipliers and DSP cells for math-intensive tasks
Boot / storage
Embedded flash supports multi-boot and user storage
Reliability
Extremely low soft error rate (FD-SOI)
Target applications
System control and management, edge AI, bridging, secure boot
Overview
Lattice MachXO5-NX is Lattice's secure control FPGA family, built on the Nexus platform using a low-power 28 nm FD-SOI process. It combines the flexibility of an FPGA with embedded flash for instant-on, non-volatile configuration, high I/O count and security features aimed at system control and management.
The family supports a wide set of interfaces — MIPI D-PHY for CSI-2 and DSI, LVDS, Ethernet, PCIe and DDR — and includes multipliers and DSP cells so it can also take on math-intensive and edge-AI tasks. Embedded flash supports multi-boot and user storage, and the FD-SOI process gives an extremely low soft-error rate, which is why the family is widely used for control, management and secure-boot functions in compute, communications and industrial systems. A PQC-ready MachXO5-NX TDQ variant targets post-quantum security.
Key Benefits
Embedded flash, instant-on removes external configuration memory. 28nm FD-SOI with very low soft-error rate gives high reliability. MIPI D-PHY, PCIe, Ethernet, DDR cover control and bridging interfaces. DSP cells and security features handle math and secure-boot tasks.
Applications
System control and management, secure boot and root-of-trust, edge AI and math-intensive processing, interface bridging, and industrial and communications control planes.
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