SK hynix 24Gb GDDR7 at 48 Gb/s — ISSCC 2026 Dual-Channel GDDR7

Specifications

Overview

SK hynix used ISSCC 2026 to present an 24 Gb GDDR7 device running at 48 Gb/s per pin — a number well above the 32–37 Gb/s the industry had pencilled in for this point in the GDDR7 cycle. The company reaches it with a symmetric dual-channel architecture and reworked internal interfaces rather than an exotic process, which is why the uplift is large: per-chip bandwidth moves from 112 GB/s at 28 Gb/s to 192 GB/s, a jump of more than 70 %.

The stated target is mid-range AI inference, not consumer graphics. That is a notable shift for GDDR7: with 8 × 3 GB devices delivering 24 GB per board at 192 GB/s per chip, a GDDR7-based inference accelerator reaches a bandwidth tier that previously implied HBM. For inference workloads that are bandwidth-bound but do not need HBM's capacity or cost, that is a favourable trade.

Public product clocks will land below the paper rate, since GPU vendors tune memory speed against yield and power targets. Even so, the direction is clear: GDDR7 is now a credible AI inference memory, and SK hynix is one of three suppliers — with Samsung already shipping 24 Gb parts and Micron listing both 28 and 32 GT/s entries — so module and board buyers have real second-source depth. QS Compute supplies GDDR7-based accelerators and modules across all three vendors.

Key Benefits

192 GB/s per device — more than 70 % above current 28 Gb/s GDDR7 — puts GDDR7 into bandwidth territory that used to require HBM. 3 GB density reaches 24 GB on eight placements. Symmetric dual-channel design improves internal efficiency without a process change, and the part is aimed squarely at mid-range AI inference, where bandwidth per dollar matters most.

Applications

Mid-range AI inference accelerators where HBM is over-specified; AI workstations holding 24 GB models; bandwidth-bound inference serving; and cost-sensitive accelerator designs that need more than GDDR6X bandwidth.

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