Specifications
Part Numbers
K4VAF325ZC-SC32 (32 Gbps) · K4VAF325ZC-SC28 (28 Gbps)
Density
16 Gb (2 GB per device)
Organization
512M × 32
Bus Width
32-bit per device
Data Rate
32.0 Gbps / 28.0 Gbps per pin
Signaling
PAM3 (three-level pulse amplitude modulation)
Refresh
16K / 32 ms
Package
266-ball FBGA
Voltage
1.2 V class (GDDR7 low-voltage signalling)
System Bandwidth
Greater than 1.5 TB/s with a full 32-bit-wide GDDR7 frame buffer
Bandwidth per Component
128 GB/s at 32 Gbps
Channels per Package
4 independent channels
Access per Channel
32 bytes
Access per Device
1024 bits
Power Efficiency
PAM3 signalling reduces power per bit versus NRZ GDDR6
Density Roadmap
16 Gb and 24 Gb (3 GB) modules; per-pin speeds to 40 Gbps
Status
Sampling / production
Applications Class
Graphics cards, AI inference accelerators, automotive compute
Predecessor
GDDR6 at up to 24 Gbps
Overview
Samsung GDDR7 is the graphics DRAM generation that replaced GDDR6 in high-end GPUs, and K4VAF325ZC-SC32 and K4VAF325ZC-SC28 are the two publicly catalogued 16 Gb dies: the 32 Gbps speed grade and the low-voltage optimised 28 Gbps grade. Both are 512M x32 devices in a 266-ball FBGA package with a 16K/32 ms refresh cycle.
The architectural change is PAM3 signalling — three-level pulse amplitude modulation instead of the two-level NRZ of GDDR6. That lets GDDR7 reach 32 Gbps per pin on the same package class, which translates to 128 GB/s per component and more than 1.5 TB/s of aggregate system bandwidth on a wide frame-buffer bus. The 32-bit device width and four independent channels per package mean designers can interleave access without increasing the pin count.
In practice, the 28 Gbps part is what the first wave of GDDR7 graphics and inference cards used, with the 32 Gbps grade reserved for flagship boards and refreshes. Samsung has also published a 24 Gb (3 GB) GDDR7 die and a ceiling of 40 Gbps per pin, so the same package and board layout can scale upward. For AI inference and automotive sensor-fusion designs, the appeal is bandwidth per watt: GDDR7 lowers pJ/bit relative to GDDR6 while increasing the ceiling roughly 45 %.
Key Benefits
32 Gbps per pin on a standard 266 FBGA footprint for drop-in board upgrades. PAM3 signalling improves power efficiency versus GDDR6 NRZ. Four channels per package with 32-byte access granularity improves effective utilisation. 16 Gb and 24 Gb density options scale frame-buffer capacity without re-laying out the board. 1.5 TB/s class system bandwidth removes memory-side bottlenecks for inference-time batch scaling.
Applications
Discrete graphics cards and workstation GPUs; AI inference accelerators and edge inference boards; automotive ADAS compute and sensor fusion; high-resolution video and 8K image processing; professional visualisation and simulation; console-class rendering hardware; HPC accelerators where GDDR bandwidth per dollar beats HBM.
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