Specifications
Architecture
Factorized Power Architecture (FPA) — separates DC-DC conversion into a regulation stage and a voltage-transformation stage
Current density
>3.0 A/mm2 at the point of load (vertical power delivery)
Current gain
>40 — the critical metric for high-power AI loads
AI processor rail
1 V nominal, derived from a regulated 48 V factorized bus with K = 48 current multiplication
Module thickness
1.5 mm ultra-thin VPD profile for placement under the processor
Thermal resistance
0.3 C/W
48 V PDN advantage
4x less current than a 12 V PDN and 8x less than a 6 V PDN, cutting I2R loss
BCM bus converters
Isolated, fixed K-factor step-down from HVDC distribution to the 48 V intermediate bus; VOUT = VIN x K
NBM bus converters
Non-isolated, bidirectional, fixed K = 1/4 DC transformer bridging 48 V and 12 V at peak efficiency near 98%
DCM DC-DC converters
Isolated, regulated 12 V output from a variable 48 V input for legacy HDD/PCIe loads
ZVS buck regulators
48 V direct to 12 V / 5 V / 3.3 V / 2.5 V server auxiliary rails, removing the intermediate 12 V stage
Transient response
High-bandwidth proprietary control loop with low output ripple — avoids DVFS throttling of compute
Distribution level
Rack- and blade-level conversion at higher distribution voltages to cut copper cabling and I2R losses
Isolation
Galvanic isolation in BCM stages protects server components from high-voltage transients
Deployment
Vertical power delivery under xPU packages and 48 V power-on-package (PoP) designs for hyperscale AI accelerators
Ecosystem
Built for OCP Open Rack V2.2 48 V backplane architectures and 48 V AI accelerator input connectors
Overview
Vicor's 48V-centric Factorized Power Architecture (FPA) is the reference power-delivery chain for high-current AI processors. Instead of a conventional multiphase regulator at the point of load, FPA splits conversion into two functional stages: a regulation stage that holds a stable 48 V factorized bus, and a voltage-transformation stage that multiplies current right under the processor package.
Keeping 48 V all the way to the point of load cuts distribution current dramatically — a 48 V power delivery network carries four times less current than 12 V and eight times less than 6 V — which directly reduces I2R losses and copper demand at rack scale. The transformation stage then divides the 48 V bus by a K factor of 48 to produce a 1 V nominal AI processor rail with a current gain above 40.
The result is vertical power delivery (VPD) that reaches more than 3.0 A/mm2 of current density in a 1.5 mm thin module with 0.3 C/W thermal resistance, paired with the BCM, NBM, DCM and ZVS buck families that span the whole power delivery network from HVDC rack distribution down to auxiliary rails.
Key Benefits
Highest current density (>3.0 A/mm2) and current gain (>40) available for vertical power delivery, with 1.5 mm thin packaging and 0.3 C/W thermal resistance that simplify thermal and mechanical design under the processor. A high-bandwidth control loop delivers fast transient response and low ripple, so AI processors can avoid DVFS throttling and sustain compute performance. The 48 V PDN cuts I2R and cabling losses against 12 V and 6 V alternatives, improving FLOPS/watt, tokens/second/watt and overall PUE.
Applications
Hyperscale AI accelerators and GPUs needing 48 V direct-to-package power; OCP Open Rack V2.2 and ORV3 48 V backplane shelves; HVDC rack distribution with BCM step-down; 12 V to 48 V migration of existing servers using bidirectional NBM converters; server auxiliary rails fed directly from 48 V with ZVS buck regulators; and data-center power architectures targeting better PUE and lower total cost of ownership.
Request a Quote — VICOR 48V VERTICAL POWER DELIVERY MODULES — FACTORIZED POWER FOR AI PROCESSORS
QS Compute — global B2B supply of AI computing hardware, edge AI systems and accelerators. Volume pricing, 15-day sample lead time.
Get Your Quote →