Specifications

FPGA

Intel Stratix 10 DX with HBM2 (1SD21BPT2F53E2VG)

On-package HBM

8 GB HBM2 (2x 4 GB), internal to the FPGA package

On-board Memory

32 GB (2x 16 GB banks) with ECC — no ping-pong buffer required

Network Controllers

2x Intel E810-CAM1 Ethernet controllers

Network Ports

4x QSFP28 supporting 100G-SR4, 100G-LR4 and 100G direct attach copper

Host Interface

PCIe Gen4 x16 (16 GT/s), requires a physical x16 slot

Form Factor

Full height, full length, single slot with active heatsink

Passive Option

Full height, 3/4 length, dual slot passive heatsink for server airflow

Power Budget

225 W target — 75 W from the PCIe slot plus 150 W from the 12V auxiliary connector

Auxiliary Power

On-board 12V auxiliary connector required for loads above 75 W

Thermal Design

Active heatsink targeted at single socket; passive heatsink for dual-slot servers; built-in thermal protection

Reliability

MTTF 246,963 hours at 50 C, L10 35,280 hours

Sensors

FPGA temperature, ambient temperature, power and fan speed (active SKU)

Port Indication

4x link/activity LEDs per QSFP28 plus status LEDs for power fail, status OK and FPGA configuration

Regulatory

FCC Class A, CE, UL, RoHS

Storage Temperature

-40 to 65 C

Series

N5010 and N6010 FPGA SmartNIC series with N6010/N6011 OEM hardware platform variants

Overview

The Silicom N5010 and N6010 are FPGA SmartNICs that place an Intel Stratix 10 DX device with integrated HBM2 at the head of a PCIe Gen4 x16 card and connect it to the network through two Intel E810-CAM1 controllers driving four 100G QSFP28 ports. The combination of the FPGA fabric, 8 GB of on-package HBM2 and 32 GB of on-board ECC DDR memory means packet-processing, inline analytics and even AI-style inference logic can run directly on the card against data that never crosses the PCIe bus.

Because the E810 controllers handle the Ethernet MAC and offload functions, the Stratix 10 DX fabric is free to implement custom pipelines: programmable packet parsing, telemetry extraction, encryption, compression, regex matching and bespoke accelerator blocks. Intel's oneAPI and OpenCL toolchains, along with AMD-Xilinx-style vendor IP cores in Silicom's own library, can target the device.

Two airflow configurations are offered — an active full-height single-slot card aimed at single-socket servers and a passive dual-slot card that relies on chassis airflow. Both draw up to 225 W, split between the 75 W the PCIe slot can supply and a 150 W 12V auxiliary feed, and both ship with thermal protection and FPGA configuration status LEDs for datacenter serviceability.

Key Benefits

HBM2 on the card: 8 GB of on-package FPGA memory plus 32 GB ECC DDR for stateful line-rate processing. Four 100G ports: 2x Intel E810-CAM1 controllers with QSFP28 SR4, LR4 and DAC support. Programmable data path: Stratix 10 DX fabric for custom parsing, telemetry, crypto and compression pipelines. Datacenter proven: 246,963 hour MTTF and both active and passive thermal SKUs.

Applications

Line-rate packet inspection and inline analytics, network telemetry and flow monitoring, financial low-latency workloads, 100G security and encryption offload, video and sensor stream processing on the card, and FPGA-accelerated research platforms.

Request a Quote — SILICOM N5010 / N6010 — INTEL STRATIX 10 DX FPGA SMARTNIC

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