Specifications
MPN
PM50084
Family
Switchtec PFX 100xG5 fanout PCIe switch
Lanes
84 lanes PCIe Gen5
Generation
PCIe 5.0, 32 GT/s
Sibling Ladder
PM50028 / PM50036 / PM50052 / PM50068 / PM50084 / PM50100
Bridging
Non-transparent bridging, multi-host partition support
Configuration
Software or strap-set bifurcation and port partitioning
Reference Board
Available on the Switchtec Gen 5 reference validation platform
Management
Out-of-band management with telemetry
Typical Deployment
8-GPU in-box fan-out, 24-32 bay NVMe shelf, dual-host storage
Power
Gen5 SerDes with per-lane power optimisation
Availability
Silicon and partner add-in cards / MCIO switch boards
Overview
The PM50084 sits one step below the x100 device in Microchip's Switchtec PFX 100xG5 fanout family. Eighty-four lanes is the natural size for an eight-GPU in-box topology or a dense NVMe shelf where the x100 part leaves lanes unconnected.
It keeps the family's non-transparent bridging and partitioning model, so the same firmware and configuration tooling carry across a product line that spans 28 to 100 lanes.
Key Benefits
84 Gen5 lanes right-sized for 8-GPU in-box fabrics · NTB and partitions · Common tooling across the PM500xx ladder · Telemetry and OOB management · Silicon or partner switch boards
Applications
8-GPU server in-box fan-out, dense NVMe shelf controllers, dual-host storage, PCIe backplane switching, composable infrastructure, test and instrumentation fabrics
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