Specifications
Model
MSI CD182-S6091-X2 (DLC)
Form Factor
1OU2N — two server nodes per 1 OU chassis
Platform
AMD 6th-generation EPYC 'Venice' (dual-socket per node)
Processors per Rack Unit
Four AMD processors plus full memory complements in one OCP v3 rack unit
Memory Channels
16 DIMM channels per CPU, shown populated in the system
Cooling
Direct liquid cooling — cold plates on the CPUs (the 'DLC' in the model name)
TDP Context
5th-gen EPYC parts already reach 500 W each; Venice adds channels, so liquid cooling is required
Rack Standard
OCP v3 rack
Intended Use
High-density installations
Display Status
Shown at Computex 2026 ahead of the Venice launch
Why Liquid
Air cooling is reaching its limits as CPU TDP and channel counts rise
Industry Context
Liquid cooling was a common theme across server booths at Computex 2026
Deployment
Dense compute racks where per-rack-unit processor count is the constraint
Supply
B2B volume supply; quote per configuration
Overview
The MSI CD182-S6091-X2 (DLC) is a 1OU2N server node — two dual-socket nodes inside a single OU chassis — designed around AMD's 6th-generation EPYC 'Venice' platform. It is an unreleased-generation design shown publicly at Computex 2026, which is normal for OEM platforms developed ahead of a processor launch.
The density claim is specific: with two nodes per OU and dual sockets in each, four AMD processors and their complete memory complements fit inside a single unit of OCP's v3 rack standard. The system as shown carries 16 DIMM channels per CPU, so the memory footprint per rack unit is substantial.
That is also why the model name ends in DLC. Direct liquid cooling with CPU cold plates is not a preference here but a requirement: 5th-generation EPYC parts already reach 500 W each, and Venice adds memory channels on top. Across Computex 2026, liquid cooling appeared in server booth after server booth for the same reason — air cooling is running out of headroom as socket power and channel counts climb together.
Key Benefits
Four processors per OCP v3 rack unit via the 1OU2N node layout. Direct liquid cooling with cold plates to hold 16-channel, high-TDP Venice processors within thermal limits. Memory density at 16 DIMM channels per CPU. Built for dense installations where rack-unit processor count is the binding constraint.
Applications
High-density compute clusters on the AMD EPYC Venice platform; OCP v3 rack deployments; liquid-cooled HPC and AI-adjacent compute nodes; datacentre retrofits where rack power and cooling are already liquid-ready; memory-bandwidth-bound workloads needing 16 channels per socket.
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