Specifications

Overview

Euclyd is a European inference-silicon startup based in Eindhoven, the Netherlands, with a second office in San Jose, California. Its CRAFTWERK architecture rethinks inference “from the ground up” — custom processors, custom memory and advanced 2.5D/3D packaging — in pursuit of the industry’s lowest power and cost per token for agentic AI workloads. The premise is that memory bandwidth, not raw arithmetic, is the binding constraint on inference economics: Euclyd claims roughly 100× better power efficiency and cost per token than leading incumbent solutions.

The CRAFTWERK SiP is a palm-sized system-in-package carrying 16,384 custom SIMD processors and 1 TB of Ultra Bandwidth Memory (UBM) delivering a claimed 8,000 TB/s. Peak compute is 8 PFLOPS in FP16 or 32 PFLOPS in FP4 at approximately 3 kW. By placing a terabyte of memory in the package rather than over an HBM interface, Euclyd targets dense single-silicon multi-agent serving without the capacity and bandwidth ceilings that constrain HBM-based accelerators.

At rack scale, the Craftwerk Station CWS 32 aggregates 32 CRAFTWERK SiPs and 16 CPUs into a single liquid-cooled system rated at 1.024 exaFLOPS FP4 with 32 TB of on-package memory and 256 PB/s of aggregate bandwidth, drawing roughly 125 kW. Euclyd positions the rack as the world’s lowest-power exascale AI token factory. Silicon development is being carried out with Korean design house ADTechnology, and the company is backed by figures including former ASML CEO Peter Wennink and microprocessor pioneer Federico Faggin. CRAFTWERK figures are modeled projections from a design still in advanced stage; availability is quoted on request.