Specifications
MPN
XCVU13P-2FHGB2104E
Device
XCVU13P
Family
AMD Virtex UltraScale+ FPGA
Package
FHGB2104 (2104-ball FCBGA)
Speed Grade
-2
Temperature Grade
E — extended (0 °C to +100 °C Tj)
System Logic Cells (K)
3,780
DSP Slices
12,288
Memory (Mb)
455
GTY/GTM Transceivers (32.75/58 Gb/s)
128 / 0
Maximum I/O Pins
832
Memory Interface
DDR4 up to 2,666 Mb/s
Toolchain
AMD Vivado / Vitis unified software platform
Vendor
AMD
Overview
The XCVU13P (ordering code XCVU13P-2FHGB2104E) is the largest Virtex UltraScale+ FPGA without on-package HBM: 3,780K system logic cells, 12,288 DSP slices, 455 Mb of memory and 128 GTY transceivers at up to 32.75 Gb/s, in a 2104-ball FCBGA.
At this density the device is used where a 16 nm ASIC is uneconomic or where the algorithm is still evolving: 800G optical transport, ASIC emulation, high-frequency trading, wideband radar and electronic warfare, and DNA sequencing acceleration. The 128 GTY transceivers and 832 I/O pins make it viable as the single switching and compute element in a dense line card. Designs are built with AMD Vivado. We supply the XCVU13P-2FHGB2104E factory-sealed through distribution channels — contact us for availability, lead time and pricing.
Key Benefits
Highest logic and DSP density short of an ASIC; 128 × 32.75 Gb/s GTY transceivers for 800G-class I/O; 455 Mb of on-chip memory; AMD Vivado toolchain.
Applications
800G/1.6T optical transport, ASIC prototyping and emulation, electronic warfare and wideband radar, high-frequency trading, genomics and scientific computing acceleration.
Request a Quote — XCVU13P-2FHGB2104E
QS Compute — global B2B supply of AI computing hardware, edge AI systems and accelerators. Volume pricing, 15-day sample lead time.
Get Your Quote →