Specifications

Ordering Code

LIFCL-40-EVN

Board

CrossLink-NX Evaluation Board

FPGA Device

LIFCL-40 (CrossLink-NX)

Logic Elements

39K LUT4

Platform

Lattice Nexus 2 (FD-SOI 28 nm)

Embedded Block RAM

1.56 Mb EBR + 1.28 Mb LRAM

MIPI D-PHY

Hardened D-PHY, 2.5 Gbps per lane

SerDes

2x 2.5 Gbps

PCIe

PCIe Gen2 x1 hard IP

Memory

On-board DDR3, SPI flash for configuration

Display

DP/eDP, MIPI DSI output

Camera

MIPI CSI-2 input (pair of image sensors)

Standby Power

Sub-100 mW (device, low-power standby mode)

Configuration

Instant-on, single SPI flash boot in under 10 ms

Toolchain

Lattice Radiant software, Propel RISC-V build flow

Vendor

Lattice Semiconductor

Lattice Nexus FPGA evaluation boards

Ordering CodeBoardDeviceLogic ElementsTarget
LIFCL-40-EVNCrossLink-NX Evaluation BoardLIFCL-4039KEmbedded vision / MIPI bridging
LIFCL-33U-EVNCrossLink-NX-33 Evaluation BoardLIFCL-33U33KCompact MIPI bridging
LFCPNX-EVNCertusPro-NX Evaluation BoardLFCPNX-10098KLow-power edge processing
LFD2NX-VERSA-B-EVNCertus-NX Versa BoardLFD2NX-4039KPCIe / Ethernet bridging

Overview

CrossLink-NX is Lattice's Nexus 2 family built on FD-SOI, and the LIFCL-40 evaluation board is the fastest way to bring up designs that sit between an image sensor and a host processor. The hardened MIPI D-PHY blocks accept CSI-2 camera input directly without consuming fabric, and the 2.5 Gbps SerDes plus PCIe Gen2 hard IP cover the host-side link. Because FD-SOI keeps static power low, standby figures are measured in tens of milliwatts — the reason CrossLink-NX appears in battery-powered and always-on embedded vision products. The board is programmed in Lattice Radiant and ships as ordering code LIFCL-40-EVN.

Need Lattice CrossLink-NX Evaluation Board (LIFCL-40) (LIFCL-40-EVN)?

Enterprise hardware — configured, tested, deployed. Contact us for pricing and availability.

Request Quote