Specifications

SoC

AMD Zynq UltraScale+ RFSoC, XCZU48DR or XCZU43DR

SKUs

AM-XRU50-48DR-2C-D4E, AM-XRU50-43DR-1C-D3E

RF-ADC

8 x 14-bit RF-ADC, up to 5 GSPS

RF-DAC

8 x 14-bit RF-DAC, up to 9.85 GSPS

PS Processor

Quad-core Arm Cortex-A53 at 1.5 GHz

PS Memory

Up to 8 GB DDR4-2400 x72 with ECC

PL Memory

Up to 8 GB DDR4-2666 x64

eMMC

16 GB eMMC flash (PS)

QSPI Flash

64 MB (PS)

User I/O

202 total: 156 HP (1-1.8 V), 24 HD (1.2-3.3 V), 22 MIO (1.8-3.3 V)

Transceivers

16 x PL GTY up to 28.21 Gbps plus 4 x PS GTR at 6 Gbps

Expansion

5 x ADM6-60 Samtec connectors

PCIe

PCIe Gen4 x8 and Gen2 x4

Ethernet

2 x Gigabit Ethernet PHY (PS + PL)

USB

USB 2.0 PHY; USB 3.0 via PS GTR

Supply

Single 12 V input

Form Factor

Andromeda L, 80 x 64 mm

Operating Temp

Industrial, -40 C to +85 C

Development Kit

Prototype Andromeda XRU50 kit with Neso RF front-end board, base board and accessories

Status

In development - contact vendor for availability

Overview

The Enclustra Andromeda XRU50 RFSoC module packs a full direct-RF signal chain into an 80 x 64 mm system-on-module. Its AMD Zynq UltraScale+ RFSoC device integrates eight 14-bit RF-ADCs to 5 GSPS and eight 14-bit RF-DACs to 9.85 GSPS, allowing direct synthesis and capture of RF signals without discrete analog up/down-conversion stages.

Dual memory banks - up to 8 GB of ECC DDR4 on the processing system and up to 8 GB on the programmable logic - feed the quad-core Cortex-A53 and FPGA fabric respectively, while 16 GB of eMMC and 64 MB of QSPI flash provide non-volatile storage for boot images and application payloads.

With 202 user I/Os, 16 PL GTY transceivers to 28.21 Gbps, PCIe Gen4 x8 and five ADM6-60 Samtec connectors, the module is designed for next-generation wireless and satellite communications, test and measurement, phased-array radar and quantum computing control systems.

Key Benefits

Direct RF synthesis removes analog up/down-conversion hardware. Eight ADC and eight DAC channels serve multi-antenna and phased-array designs from one module. ECC DDR4 on the PS protects control-plane data, while dual PL/PS memory banks keep the FPGA fabric fed. High-speed GTY transceivers and PCIe Gen4 handle backplane and host links, and the 80 x 64 mm industrial-temperature module suits space-constrained, harsh-environment RF systems.

Applications

Software defined radio, 5G and next-generation wireless infrastructure, satellite communications payloads, phased-array radar, test and measurement instrumentation, quantum computing control, and high-speed data acquisition.

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