Specifications

Ordering Code

EK-U1-ZCU102-G

Kit

Zynq UltraScale+ MPSoC ZCU102 Evaluation Kit

Device

XCZU9EG-2FFVB1156E

Logic Cells

600K

DSP Slices

2,520

Processing System

Quad-core Arm Cortex-A53 (APU) + dual Cortex-R5F (RPU) + Mali-400 GPU

Memory

4GB 64-bit DDR4 (PS) + 1GB 32-bit DDR4 (PL)

PCIe

PCIe Gen3 x16 lane slot (Gen2 x4 shared with other blocks)

Networking

4x SFP+ cages, 1x RJ45 GbE, 1x SGMII

Display

DisplayPort 1.2 output

USB

USB 3.0, USB 2.0 (JTAG/UART)

Storage

SD card, 64MB QSPI, eMMC

Expansion

FMC-HPC, 2x FMC (HPC + LPC), PMOD, user GPIO

Debug

On-board JTAG, Arm DAP, System Controller

Toolchain

AMD Vivado + Vitis (free WebPACK device support for ZU9)

Vendor

AMD (formerly Xilinx)

Zynq UltraScale+ MPSoC evaluation kit comparison

Ordering CodeKitDeviceLogic CellsMemory
EK-U1-ZCU102-GZCU102 Evaluation KitXCZU9EG600K4GB DDR4 PS + 1GB PL
EK-U1-ZCU104-GZCU104 Evaluation KitXCZU7EV504K2GB DDR4 PS + 1GB PL
EK-U1-ZCU106-GZCU106 Evaluation KitXCZU7EV504K4GB DDR4 PS + 1GB PL
EK-U1-ZCU111-GZCU111 RFSoC Evaluation KitXCZU28DR930K4GB DDR4 + RF tiles

Overview

The ZCU102 is AMD's flagship general-purpose evaluation kit for the Zynq UltraScale+ MPSoC and the board most reference designs in that family are validated against. The XCZU9EG device combines a quad-core Arm Cortex-A53 application processor, a dual-core Cortex-R5F real-time unit, a Mali-400 GPU and a 600K logic-cell programmable fabric, so a single board covers embedded Linux, deterministic real-time control and hardened accelerator workloads. Ordering code EK-U1-ZCU102-G ships with a PCIe Gen3 x16 slot, four SFP+ cages, DisplayPort, USB 3.0 and both HPC and LPC FMC sites, which is enough to hang a real datapath off the fabric before a custom carrier is designed. Development uses AMD Vivado and Vitis.

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