Specifications

Series

XMC-ZU — configurable Zynq UltraScale+ MPSoC with plug-in I/O

MPN, VITA 42, air-cooled

XMC-ZU5EV1-42-30 (AXM front I/O)

MPN, VITA 42, conduction-cooled

XMC-ZU5EV1-42-50 (rear I/O, no AXM)

MPN, VITA 61, air-cooled

XMC-ZU5EV1-61-30 (AXM front I/O)

MPN, VITA 61, conduction-cooled

XMC-ZU5EV1-61-50 (rear I/O, no AXM)

FPGA / SoC

AMD (Xilinx) Zynq UltraScale+ XCZU5EV MPSoC

Processing System

Quad-core Arm Cortex-A53 application processor plus dual-core Cortex-R5

Dedicated Blocks

On-chip graphics and video encode/decode processing

Companion Series

XMC-FZU — Zynq UltraScale+ with plug-in 10GbE

mini PCIe Variant

APZU-300 AcroPack, 70 mm wide — smallest FPGA mezzanine module

FPGA Fabric Range

XMC, PMC and mPCIe boards up to 410K logic cells

Legacy Families

Artix-7 (XMC-7A), Kintex-7 (XMC-7K), Spartan-6 (XMC-SLX / PMC-SLX)

Memory, Artix/Kintex-7 XMC

128 Meg x 64-bit DDR3 SDRAM plus 32 Meg x 16-bit Flash

High-Speed Serial, P15

Four or eight lanes for PCIe, Serial RapidIO or 10 Gigabit Ethernet

Rear I/O, P4

Two global clock differential pairs plus 30 LVDS signal pairs

Configuration

In-system download over PCIe bus or standard JTAG

Development Kit

Engineering Design Kit with compiled FPGA file and example VHDL

Form Factors

XMC, PMC and mini PCIe (AcroPack) mezzanine

Target Use

Real-time control, sensor fusion, DSP and rugged embedded I/O processing

Overview

Acromag's XMC-ZU Series places an AMD (Xilinx) Zynq UltraScale+ MPSoC on a swappable mezzanine module, combining a quad-core Arm Cortex-A53 application processor, a dual-core Cortex-R5 real-time processor and FPGA fabric in a single device. The result is a module that can run the real-time control and decision logic on ARM cores while the programmable logic handles parallel, latency-critical data movement.

The series is defined by its ordering matrix. The part number encodes the device, the connector standard and the cooling method: XMC-ZU5EV1-42-30 and -61-30 are air-cooled variants with AXM front I/O on VITA 42 and VITA 61 respectively, while XMC-ZU5EV1-42-50 and -61-50 are conduction-cooled with rear I/O and no AXM module. That gives system designers a single architecture that can be specified for a benchtop development chassis or a sealed conduction-cooled military enclosure.

Where higher-speed fabric egress is required, the XMC-FZU Series adds plug-in 10 Gigabit Ethernet. For space-constrained designs, the AcroPack APZU-300 puts the same Zynq UltraScale+ MPSoC on a 70 mm mini PCIe card with an added 100-pin field I/O connector — the smallest FPGA mezzanine module Acromag offers. Acromag's broader FPGA line also spans Artix-7, Kintex-7 and Spartan-6 XMC and PMC modules with up to 410K logic cells, using shared P15/P16/P4 connectors and DDR3 memory maps across families.

Key Benefits

Heterogeneous compute on one module — ARM Cortex-A53 application cores, Cortex-R5 real-time cores and FPGA fabric in an XCZU5EV; four cooling and connector variants in one part-number family for air-cooled and conduction-cooled chassis; reusable design effort through a common Engineering Design Kit with example VHDL and DMA demo code; 10GbE egress via the XMC-FZU companion series; and 70 mm footprint options through the AcroPack APZU-300.

Applications

Real-time industrial control and deterministic I/O processing; sensor fusion and front-end acquisition for radar, imaging and instrumentation; DSP and high-channel-count digital interfaces; data acquisition with change-of-state interrupts; and rugged or conduction-cooled defence and aerospace embedded subsystems.

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